mhakhan
PHONE

Office:   221

EMAIL

mhakhan@ewubd.edu

PERSONAL WEB

Dr. Md. Mozammel Huq Azad Khan

Professor and Chairperson
Department of Computer Science & Engineering

Ph.D in Computer Science and Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh
M.Sc Engg.  in Computer  Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh
B.Sc Engg. in Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh 

Teaching Positions

Sept 1999 – date Professor Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Jan 1998 – Aug 1999 Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Jun 1993 – Jan 1998 Associate Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Feb 1991 – Jun 1993 Assistant Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Jan 1988 – Feb 1991 Assistant Professor Electrical and Electronic Engineering Department
Bangladesh Institute of Technology, Rajshahi (Currently Rajshahi University of Engineering and Technology), Rajshahi, Bangladesh
Dec 1986 – Jan 1988 Lecturer Electrical and Electronic Engineering Department
Bangladesh Institute of Technology, Rajshahi (Currently Rajshahi University of Engineering and Technology), Rajshahi, Bangladesh

Educational Administrative Positions

March 2016 – To Date Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Dec 2008 – Dec 2010 Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Oct 2004 – Dec 2006 Dean
(Founding)
Faculty of Sciences and Engineering
East West University, Dhaka, Bangladesh
Apr 1997 – Jun 1999 Dean
(Founding)
Science, Engineering and Technology School
Khulna University, Khulna, Bangladesh
Dec 2004- Dec 2005 Chairperson
(Founding)
Electrical and Electronic Engineering Department
East West University, Dhaka, Bangladesh
Oct 2000 – Sep 2003 Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Feb 1997 – Nov 1998 Head
(Founding)
Electronics and Communications Engineering Discipline
Khulna University, Khulna, Bangladesh
Sep 1996 – Jun 1999 Head Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Apr 1991 – Sep 1994 Head
(Founding)
Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh

Non-Teaching Positions

Apr 1985 – Dec 1986 Assistant Engineer Bangladesh Atomic Energy Commission
  • Reversible/Quantum Logic
  • Multiple-Valued Logic
  • Quantum Computing
  • Soft Computing
  • Evolutionary Algorithms
  • Graph Problems
  • Nono-Electronics


Journal Publication

Journal Papers:

  1. Mozammel H. A. Khan, Himanshu Thapliyal, and Edgard Munoz-Coreas, “Automatic synthesis of quaternary quantum circuits,” The Journal of Supercomputing, vol. 73, iss. 5, May 2017, pp 1733–1759.
  2. Pronaya Prosun Das, Mozammel H. A. Khan, “Quantum-inspired evolutionary algorithm to solve graph coloring problem,” International Journal of Advances in Computer Science & Its Applications – IJCSIA, vol. 4, iss. 4, pp. 66-70, 2014.
  3. Pronaya Prosun Das and Mozammel H. A. Khan, “An effective quantum-inspired evolutionary algorithm for finding degree-constrained minimum spanning tree,” International Journal of Computer Science and Electronics Engineering, (IJCSEE), vol. 2, no. 4, pp. 202-204, 2014.
  4. Mozammel H A Khan, “Design of reversible synchronous sequential circuits using pseudo Reed-Muller expressions,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 11, pp. 2278-2286, 2014.
  5. Hasin Al Rabat Chowdhury, Tasneem Farhat, and Mozammel H A Khan, “Memetic algorithm to solve graph coloring problem,” International Journal of Computer Theory and Engineering, vol. 5, no. 6, pp. 890-894, 2013.
  6. Salena Akter and Mozammel H A Khan, “Multiple-case outlier detection in multiple linear regression model using quantum-inspired evolutionary algorithm,” Journal of Computers, vol. 5, no. 12, pp. 1779-1788, 2010.
  7. Mozammel H A Khan, “Multiple-case outlier detection in least-squares regression model using quantum-inspired evolutionary algorithm,” International Journal of Artificial Intelligence and Soft Computing, vol. 2, no. 3, pp. 174-185, 2010.
  8. Mozammel H A Khan, “Influence of probability of variation operator on the performance of quantum-inspired evolutionary algorithm for 0/1 knapsack problem,” The Open Artificial Intelligence Journal, vol. 4, pp. 37-48, 2010.
  9. Mozammel H A Khan, “Galois field sum of products approach to multiple-valued quantum logic circuit synthesis,” in Computer Science Research and the Internet, J. E. Morries (Ed), Nova Science Publishers, Inc., NY, USA, 2010.
  10. Mozammel H A Khan, “A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry,” Journal of Systems Architecture, vol. 54, no. 12, pp. 1113-1121, Dec. 2008.
  11. Mozammel H A Khan, “Synthesis of quaternary reversible/quantum comparators,” Journal of Systems Architecture, vol. 54, no. 10, pp. 977-982, Oct. 2008.
  12. Mozammel H A Khan, “Cost reduction in nearest neighbour based synthesis of quantum Boolean circuits,” Engineering Letters, vol. 16, no. 1, pp. 1-5, 2008.
  13. Mozammel H A Khan, “Design of reversible/quantum ternary comparator circuits,” Engineering Letters, vol. 16, no. 2, pp. 178-184, 2008.
  14. Mozammel H. A. Khan, “Reversible realization of quaternary decoder, multiplexer, and demultiplexer circuits,” Engineering Letters, vol. 15, no. 2, pp. 203-207, 2007.
  15. Mozammel H. A. Khan and Marek A. Perkowski, “GF(4) based synthesis of quaternary reversible/quantum logic circuits,” Journal of Multiple-Valued Logic and Soft Computing, 13, pp. 583-603, 2007.
  16. Mozammel H. A. Khan and Marek A Perkowski, “Quantum ternary parallel adder/subtractor with partially-look-ahead carry,” Journal of Systems Architecture, vol. 53, no. 7, pp. 453-464, 2007.
  17. Mozammel H. A. Khan, “An ASIC architecture for generating optimum mixed polarity Reed-Muller expression,” Engineering Letters, vol. 13, no. 3, pp. 236-243, 2006.
  18. Mozammel H. A. Khan, “Design of reversible/quantum ternary multiplexer and demultiplexer,” Engineering Letters, vol. 13, no. 2, pp. 65-69, 2006.
  19. Pawel Kerntopf, Marek A Perkowski, and Mozammel H A Khan, “On universality of general reversible multiple-valued logic gates,” Journal of Multiple-Valued Logic and Soft Computing, vol. 12, no. 5-6, pp. 417-429, 2006.
  20. Mozammel H A Khan, Marek A Perkowski, Mujibur R Khan, and Pawel Kerntopf, “Ternary GFSOP minimization using kronecker decision diagrams and their synthesis with quantum cascades,” Journal of Multiple-Valued Logic and Soft Computing, vol. 11, no. 5-6, pp. 567-602, 2005.
  21. M. H. A. Khan and M. S. Alam, “Mapping of on-set fixed polarity Reed-Muller coefficients from on-set canonical sum of products coefficients and the minimization of pseudo Reed-Muller expressions,” International Journal of Electronics, vol. 86(3), pp. 255-268, 1999.
  22. M. H. A. Khan and M. S. Alam, “Mapping of fixed polarity Reed-Muller coefficients from minterms and the minimization of fixed polarity Reed-Muller expressions,” International Journal of Electronics, vol. 83(2), pp. 235-247, 1997.
  23. M. H. A. Khan and M. S. Alam, “Algorithms for conversion of minterms to positive polarity Reed-Muller coefficients and vice versa,” Information Processing Letters, vol. 62, pp. 223-230, 1997.
  24. M. H. A. Khan, “On detection and prevention of static hazard for 1-variable change,” Journal of Bangladesh Academy of Sciences, vol. 20(1), pp. 9-15, 1996.
  25. M. H. A. Khan, “An algorithm for hazard-free minimization of incompletely specified switching function,” Information Processing Letters, vol. 52, pp. 23-29, 1994.
  26. M. H. A. Khan, “OR-AND-OR network synthesis,” Journal of the Bangladesh Electronics Society, vol. 4, no. 1, pp. 29-31, 1994.
  27. M. H. A. Khan, “Computer aided determination of minimal cover of a switching function,” Journal of Bangladesh Computer Society, vol. 6, no. 1, pp. 30-035, 1993.
  28. M. H. A. Khan, “Generation of prime implicants using a co-ordinate table and rule based algorithm,” Journal of the Institution of Engineers, Bangladesh, vol. 21, no. 4, pp. 31-35, 1993.
  29. M. M. A. Khan and S. M. Rahman, “Bengali – as a medium of information interchange with computers,” Journal of Bangladesh Computer Society, vol. 2, no. 1, pp. 1 – 10, 1986.

Conference & Seminars

Conference Papers:

  1. Md. Asif Nashiry, M. H. A. Khan, and J. Rice, “Controlled and uncontrolled SWAP gates in reversible logic synthesis,” in Proc. 9th Conference on Reversible Computation (RC), 6-7 July 2017,  Kolkata, India.
  2. Mozammel H A Khan and Jacqueline E. Rice, “Improved Synthesis of Reversible Sequential Circuits,” IEEE International Symposium on Circuits and Systems (ISCAS), 22 – 25 May, 2016, Montreal, Canada.
  3. Mozammel H A Khan and Himanshu Thapliyal, “Reversible logic based mapping of quaternary sequential circuits using QGFSOP expression,’ IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 8-10 July 2015, Montpellier, France.
  4. Pronaya Prosun Das and Mozammel H. A. Khan, “Solving maximum clique problem using a novel quantum-inspired evolutionary qlgorithm,” 2nd International Conference on Electrical Engineering and Information & Communication Technology (ICEEICT), 21-23 May 2015, Dhaka, Bangladesh.
  5. Mozammel H. A. Khan, “Single-electron transistor based implementation of NOT, Feynman, and Toffoli gates,” 45th IEEE International Symposium on Multiple-Valued Logic (ISMVL), to be held on 18-20 May 2015, Waterloo, Ontario, Canada.
  6. Mozammel H A Khan, “Design of ternary reversible sequential circuits.” Proc. 8th International Conference on Electrical and Computer Engineering (ICECE), 20-22 Dec. 2014, Dhaka, Bangladesh, pp. 140-143.
  7. Pronaya Prosun Das and Mozammel H. A. Khan, “An effective quantum-inspired evolutionary algorithm for finding degree-constrained minimum spanning tree,” Proc. 4th International Multi-Conference on Trends in Engineering and Technology (IMTET’2014), Dec. 2014, Pattaya, Thailand.
  8. Pronaya Prosun Das and Mozammel H. A. Khan, “Quantum-inspired evolutionary algorithm to solve graph coloring problem,” Proc. International Conference on Advances in Computing, Electronics and Electrical Technology (CEET 2014), Kuala Lampur, Malaysia, Aug. 2014, pp. 21-25.
  9. Mozammel H A Khan, “Primitive quantum gate realizations of multiple-controlled Toffoli gates,” Proc. 16th International Conference on Computer and Information Technology (ICCIT 2013), 08-10 March 2014, Khulna, Bangladesh.
  10. Mozammel H A Khan, “An evolutionary algorithm with masked mutation for 0/1 knapsack problem,” Proc. 2nd International Conference on Informatics, Electronics & Vision (ICIEV 2013), 17-18 May 2013, Dhaka, Bangladesh.
  11. Mozammel H A Khan, “Classical arithmetic logic unit embedded on reversible/quantum circuit,” Proc. 15th International Conference on Computer and Information Technology (ICCIT 2012), 22-24 December 2012, Chittagong, Bangladesh.
  12. Mozammel H A Khan, “Quaternary quantum algorithm for determining properties of quaternary logic function,” Proc. 14th International Conference on Computer and Information Technology (ICCIT 2011), 22-24 December 2011, Dhaka, Bangladesh.
  13. Mozammel H A Khan and Raqibul Hasan, “Minimized reversible/quantum synthesis of non-reversible quinary logic function,” Proc. 14th International Conference on Computer and Information Technology (ICCIT 2011), 22-24 December 2011, Dhaka, Bangladesh.
  14. Mozammel H A Khan and Marek A Perkowski, “Synthesis of reversible synchronous counters,” Proc. 41st IEEE International Symposium on Multiple-Valued Logic (ISMVL2011), 23-25 May 2011, Tusula, Finland.
  15. Mozammel H A Khan, “GFSOP-based ternary quantum logic synthesis,” (Invited Paper) Proc. Optics and Photonics for Information Processing IV (SPIE Conference 7797), 2-5 August 2010, San Diego, CA, USA.
  16. Mozammel H. A. Khan and Raqibul Hasan, “Minimized reversible synthesis of non-reversible quinary logic function,” Proc. 12th International Conference on Computer and Information Technology (ICCIT 2009), 21-23 December 2009, Dhaka, Bangladesh.
  17. Mozammel H. A. Khan and Salena Akter, “Multiple-case outlier detection in least-squares regression model using quantum-inspired evolutionary algorithm,” Proc. 12th International Conference on Computer and Information Technology (ICCIT 2009), 21-23 December 2009, Dhaka, Bangladesh.
  18. Mozammel H A Khan, “Quantum realization of multiple-valued Feynman and Toffoli gates without ancilla input,” Proc. 39th IEEE International Symposium on Multiple-Valued Logic (ISMVL2009), 21-23 May 2009, Naha, Okinawa, Japan, pp. 103-108.
  19. Mozammel H A Khan, “Scalable architecture for synthesis of reversible quaternary multiplexer and demultiplexer circuits,” Proc. 39th IEEE International Symposium on Multiple-Valued Logic (ISMVL2009), 21-23 May 2009, Naha, Okinawa, Japan, pp. 343-348.
  20. Mozammel H A Khan, “Reversible synthesis of quinary logic function,” Proc. 18th International Workshop on Post-Binary ULSI Systems (ULSIWS2009), 20 May 2009, Naha, Okinawa, Japan.
  21. Tahseen Kamal and Mozammel H.A. Khan, “An application specific integrated circuit for optimization of fixed polarity Reed-Muller expressions,” Proc. 5th International Conference on Electrical and Computer Engineering (ICECE 2008), 20-22 December 2008, Dhaka, Bangladesh.
  22. Rashida Khanum, Tahseen Kamal, and Mozammel H. A. Khan, “Genetic algorithm based synthesis of ternary reversible/quantum circuit,” Proc. 11th International Conference on Computer and Information Technology (ICCIT 2008), 25-27 December 2008, Khulna, Bangladesh.
  23. Mozammel H A Khan, Nafisa K. Siddika, and Marek A Perkowski, “Minimization of quaternary Galois field sum of products expression for multi-output quaternary logic function using quaternary Galois field decision diagram,” Proc. 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-24 May 2008, Dallas, TX, USA, pp. 125-130.
  24. Mozammel H A Khan, “Reversible realization of quaternary decoder, multiplexer, and demultiplexer circuits,” Proc. 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-24 May 2008, Dallas, TX, USA, pp. 208-213.
  25. Mozammel H A Khan, “Synthesis of incompletely specified multi-output quaternary function using quaternary quantum gates,” Proc. 10th International Conference on Computer and Information Technology (ICCIT 2007), Dhaka, Bangladesh, 27-29 December 2007.
  26. Asif I. Khan, Nadia Nusrat, Samira M. Khan, Masud Hasan, and Mozammel H. Khan, “Quantum realization of some ternary circuits using Muthukrishnan-Stroud gates,” Proc. 37th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2007), 14-16 May 2007, Oslo, Norway.
  27. Mozammel H. A. Khan and Marek A. Perkowski, “GF(4) based synthesis of quaternary reversible/quantum logic circuits,” Proc. 37th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2007), 14-16 May 2007, Oslo, Norway.
  28. M. R. Khan, M. G. A. Sujan, and Mozammel H. A. Khan, “Post-EA simplification of ternary reversible circuit,” Proc. 9th International Conference on Computer and Information Technology (ICCIT 2006), Dhaka, Bangladesh, 21-23 December 2006.
  29. Mozammel H. A. Khan, “Quaternary Galois field expansions for reversible/quantum logic synthesis,” Proc. 9th International Conference on Computer and Information Technology (ICCIT 2006), Dhaka, Bangladesh, 21-23 December 2006.
  30. Mozammel H. A. Khan, “A quantum logic circuit for generating fixed-polarity Reed-Muller coefficients,” Proc. 4th International Conference on Electrical and Computer Engineering (ICECE 2006), Dhaka, Bangladesh, 19-21 December, 2006.
  31. Mozammel H. A. Khan, “Quantum realization of quaternary Feynman and Toffoli gates,” Proc. 4th International Conference on Electrical and Computer Engineering (ICECE 2006), Dhaka, Bangladesh, 19-21 December, 2006, pp. 157-160.
  32. Mujibur Rahman Khan, Mozammel H. A. Khan, and Md. Mostofa Akbar, “A family of ternary reversible quantum gates,” Proc. 8th International Conference on Computer and Information Technology (ICCIT2005), Dhaka, Bangladesh, 28-30 Dec. 2005, pp. 388 – 392.
  33. Mozammel H A Khan, Md. Altaf Hossain, and Nasif Mahmud, “Genetic algorithm-based mapping of positive polarity Reed-Muller expressions from Boolean expressions,” Proc. 8th International Conference on Computer and Information Technology (ICCIT2005), Dhaka, Bangladesh, 28-30 Dec. 2005, pp. 1046 – 1051.
  34. Mozammel H A Khan, Marek A Perkowski, “Quantum realization of ternary parallel adder/subtractor with look-ahead carry,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  35. Mozammel H A Khan, Marek A Perkowski, “Quantum realization of ternary encoder and decoder,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  36. Mujibur Rahman Khan, Mozammel H. A. Khan, and Md. Mostofa Akbar, “Evolutionary algorithm based synthesis of multi-output ternary reversible circuits using quantum cascades,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  37. Mozammel H A Khan, “Quantum realization of ternary Toffoli gate,” Proc. 3rd International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, 28-30 Dec 2004, pp. 264-266.
  38. Mozammel H A Khan, “Quantum realization of ternary adder circuits,” Proc. 3rd International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, 28-30 Dec 2004, pp. 249-252
  39. Mozammel H A Khan, “Quantum realization of ternary Toffoli gate using ion-trap realizable Muthukrishnan-Stroud primitive gates,” Proc. 7th International Conference on Computer and Information Technology (ICCIT 2004), Dhaka, Bangladesh, 26-28 Dec 2004, pp. 369-371
  40. Mozammel H A Khan and Marek A Perkowski, “Genetic algorithm based synthesis of multi-output ternary functions using quantum cascade of generalized ternary gates,” Proc. 2004 IEEE Congress of Evolutionary Computing (CEC), Portland, Oregon, USA, 20-23 June, 2004, pp. 2194-2201.
  41. Mozammel H A Khan, Marek A Perkowski, and Mujibur R Khan, “Ternary Galois field expansions for reversible logic and kronecker decision diagrams for ternary GFSOP minimization,” Proc. 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 58-67.
  42. Pawel Kerntopf, Marek A Perkowski, and Mozammel H A Khan, “On universality of general reversible multiple-valued logic gates,” Proc. 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 68-73.
  43. Mozammel H A Khan, “Bangladeshi universities in electronic village: issues, problems, and prospects,” Proc. International Workshop on Distributed Internet Infrastructure for Education and Research, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh, 30 December 2003 – 2 January 2004, pp. 57 – 61.
  44. Mozammel H A Khan and Mujibur R Khan, “Ternary Galois field expansions and their decision diagrams,” Proc. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh, 19-21 December 2003, pp. 861-865.
  45. Mozammel H A Khan, Mujibur R Khan, and Syed A Hossain, “On construction of ternary Galois field decision diagrams,” Proc. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh, 19-21 December 2003, pp. 870-874.
  46. Kerntopf, M. Perkowski, and M. H. A. Khan, “On universality of ternary reversible logic gates,” Proc. 12th International Workshop on Post-Binary ULSI Systems, Tokyo, Japan, May 16, 2003, pp. 1 – 8.
  47. M H A Khan, M A Perkowski, P Kerntopf, “Multi-output Galois field sum of products synthesis with new quantum cascades,” Proc. 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), Tokyo, Japan, 16-19 May 2003, pp. 146 – 153.
  48. M H A Khan and M A Perkowski, “Multi-output ESOP synthesis with cascades of new reversible gate family,” Proc. 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM 2003), Trier, Germany, 10-11 March 2003, pp. 144 – 153.
  49. M H A Khan and M A Perkowski, “Reversible logic synthesis with cascades of new gate families,” Proc. 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM 2003), Trier, Germany, 10-11 March 2003, pp. 43 – 55.
  50. M H A Khan, “Design of full-adder with reversible gates,” Proc. 5th International Conference on Computer and Information Technology 2002 (ICCIT 2002), Dhaka, Bangladesh, 27-28 December 2002, pp. 515-519.
  51. S A Hossain, F Ahmed, M H A Khan, M A Sobhan and M L Rahman, “Analysis of synthesis of Bangla vowels,” Proc. 5th International Conference on Computer and Information Technology 2002 (ICCIT 2002), Dhaka, Bangladesh, 27-28 December 2002, pp. 272-276.
  52. Perkowski, P. Kerntopf, A. Al.-Rabadi, M. H. A. Khan, Multiple-Valued Quantum Computing. Issues, Open Problems, Solutions, Technical Report, KAIST, Korea, 2002.
  53. M. H. A. Khan, “A software-hardware co-method for mapping fixed polarity Reed-Muller coefficients from positive polarity Reed-Muller coefficients,” Proc. 4th International Conference on Computer and Information Technology 2001 (ICCIT 2001), Dhaka, Bangladesh, December 28-29, 2001, pp. 127-132.
  54. A. Hossain, M. H. A. Khan, and M. A. Sobhan, “Acoustic vowel space of Bangla speech,” Proc. 4th International Conference on Computer and Information Technology 2001 (ICCIT 2001), Dhaka, Bangladesh, December 28-29, 2001, pp.309-313.
  55. M. H. A. Khan, “Generation of kronecker expression for a given polarity vector from disjoint reduced sum of products expression,” Proc. 5th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RM 2001), Starkville, Mississippi, USA, August 10-11, 2001, pp. 258-270.
  56. Perkowski, L. Jozwiak, P. Kerntopf, A. Mishchenko, A. Al-Rabadi, A. Coppola, A. Buller, X. Song, M. M. H. A. Khan, S. N. Yanushkevich, V. P. Shmerko, and M. Chrzanowska-Jeske, “A general decomposition for reversible logic,” Proc. 5th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RM 2001), Starkville, Mississippi, USA, August 10-11, 2001, pp. 119-138.
  57. M. H. A. Khan, “Generation of fixed polarity Reed-Muller expression for a given polarity vector from another fixed polarity Reed-Muller expression,” Proc. 1st International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, January 5-6, 2001, pp. 49-51.
  58. M. H. A. Khan, “A software-hardware co-method for mapping positive polarity Reed-Muller coefficients from canonical sum of products coefficients and vice versa,” Proc. 3rd International Conference on Computer and Information Technology 2000 (ICCIT 2000), Dhaka, Bangladesh, January 25-26, 2001, pp. 94-98.
  59. M. H. A. Khan and M. S. Alam, “A tabular method of mapping on-set fixed polarity Reed-Muller coefficients from on-set canonical sum of products coefficients,” Proc. National Conference on Computer and Information Systems, Dhaka, Bangladesh, 9-10 December, 1997, pp. 331-336.
  60. M. Rahman and M. M. H. A. Khan, “A method to find the largest sub-set of disjoint products in optimization of AND-OR-EXOR three-level networks,” Proc. National Conference on Computer and Information Systems, Dhaka, Bangladesh, 9-10 December, 1997, pp. 326-330.
  61. M. E. Hossain, M. M. H. A. Khan and M. S. Alam, “Output queuing analysis in space division packet switching networks,” Proc. International Conference on Robotics, Vision and Parallel Processing for Industrial Automation, Ipoh, Malaysia, November 28-30, 1996, pp. 329-334.
  62. M. M. H. A. Khan and M. S. Alam, “Synthesis and minimization of fixed polarity Reed-Muller logic,” Proc. International Conference on Robotics, Vision and Parallel Processing for Industrial Automation, Ipoh, Malaysia, November 28-30, 1996, pp. 621-626.

Books

  1. M. M. H. A. Khan, Digital Logic Design, Bangladesh University Grants Commission, 2006.
  2. M. M. H. A. Khan, Computer Networks, Bangladesh Open University, 1999.
+ Academic Background

Ph.D in Computer Science and Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh
M.Sc Engg.  in Computer  Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh
B.Sc Engg. in Electrical and Electronic Engineering, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh 

+ Professional Experience

Teaching Positions

Sept 1999 – date Professor Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Jan 1998 – Aug 1999 Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Jun 1993 – Jan 1998 Associate Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Feb 1991 – Jun 1993 Assistant Professor Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Jan 1988 – Feb 1991 Assistant Professor Electrical and Electronic Engineering Department
Bangladesh Institute of Technology, Rajshahi (Currently Rajshahi University of Engineering and Technology), Rajshahi, Bangladesh
Dec 1986 – Jan 1988 Lecturer Electrical and Electronic Engineering Department
Bangladesh Institute of Technology, Rajshahi (Currently Rajshahi University of Engineering and Technology), Rajshahi, Bangladesh

Educational Administrative Positions

March 2016 – To Date Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Dec 2008 – Dec 2010 Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Oct 2004 – Dec 2006 Dean
(Founding)
Faculty of Sciences and Engineering
East West University, Dhaka, Bangladesh
Apr 1997 – Jun 1999 Dean
(Founding)
Science, Engineering and Technology School
Khulna University, Khulna, Bangladesh
Dec 2004- Dec 2005 Chairperson
(Founding)
Electrical and Electronic Engineering Department
East West University, Dhaka, Bangladesh
Oct 2000 – Sep 2003 Chairperson Computer Science and Engineering Department
East West University, Dhaka, Bangladesh
Feb 1997 – Nov 1998 Head
(Founding)
Electronics and Communications Engineering Discipline
Khulna University, Khulna, Bangladesh
Sep 1996 – Jun 1999 Head Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh
Apr 1991 – Sep 1994 Head
(Founding)
Computer Science and Engineering Discipline
Khulna University, Khulna, Bangladesh

Non-Teaching Positions

Apr 1985 – Dec 1986 Assistant Engineer Bangladesh Atomic Energy Commission
+ Research Interest
  • Reversible/Quantum Logic
  • Multiple-Valued Logic
  • Quantum Computing
  • Soft Computing
  • Evolutionary Algorithms
  • Graph Problems
  • Nono-Electronics


+ Selected Publications

Journal Publication

Journal Papers:

  1. Mozammel H. A. Khan, Himanshu Thapliyal, and Edgard Munoz-Coreas, “Automatic synthesis of quaternary quantum circuits,” The Journal of Supercomputing, vol. 73, iss. 5, May 2017, pp 1733–1759.
  2. Pronaya Prosun Das, Mozammel H. A. Khan, “Quantum-inspired evolutionary algorithm to solve graph coloring problem,” International Journal of Advances in Computer Science & Its Applications – IJCSIA, vol. 4, iss. 4, pp. 66-70, 2014.
  3. Pronaya Prosun Das and Mozammel H. A. Khan, “An effective quantum-inspired evolutionary algorithm for finding degree-constrained minimum spanning tree,” International Journal of Computer Science and Electronics Engineering, (IJCSEE), vol. 2, no. 4, pp. 202-204, 2014.
  4. Mozammel H A Khan, “Design of reversible synchronous sequential circuits using pseudo Reed-Muller expressions,” IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. 22, no. 11, pp. 2278-2286, 2014.
  5. Hasin Al Rabat Chowdhury, Tasneem Farhat, and Mozammel H A Khan, “Memetic algorithm to solve graph coloring problem,” International Journal of Computer Theory and Engineering, vol. 5, no. 6, pp. 890-894, 2013.
  6. Salena Akter and Mozammel H A Khan, “Multiple-case outlier detection in multiple linear regression model using quantum-inspired evolutionary algorithm,” Journal of Computers, vol. 5, no. 12, pp. 1779-1788, 2010.
  7. Mozammel H A Khan, “Multiple-case outlier detection in least-squares regression model using quantum-inspired evolutionary algorithm,” International Journal of Artificial Intelligence and Soft Computing, vol. 2, no. 3, pp. 174-185, 2010.
  8. Mozammel H A Khan, “Influence of probability of variation operator on the performance of quantum-inspired evolutionary algorithm for 0/1 knapsack problem,” The Open Artificial Intelligence Journal, vol. 4, pp. 37-48, 2010.
  9. Mozammel H A Khan, “Galois field sum of products approach to multiple-valued quantum logic circuit synthesis,” in Computer Science Research and the Internet, J. E. Morries (Ed), Nova Science Publishers, Inc., NY, USA, 2010.
  10. Mozammel H A Khan, “A recursive method for synthesizing quantum/reversible quaternary parallel adder/subtractor with look-ahead carry,” Journal of Systems Architecture, vol. 54, no. 12, pp. 1113-1121, Dec. 2008.
  11. Mozammel H A Khan, “Synthesis of quaternary reversible/quantum comparators,” Journal of Systems Architecture, vol. 54, no. 10, pp. 977-982, Oct. 2008.
  12. Mozammel H A Khan, “Cost reduction in nearest neighbour based synthesis of quantum Boolean circuits,” Engineering Letters, vol. 16, no. 1, pp. 1-5, 2008.
  13. Mozammel H A Khan, “Design of reversible/quantum ternary comparator circuits,” Engineering Letters, vol. 16, no. 2, pp. 178-184, 2008.
  14. Mozammel H. A. Khan, “Reversible realization of quaternary decoder, multiplexer, and demultiplexer circuits,” Engineering Letters, vol. 15, no. 2, pp. 203-207, 2007.
  15. Mozammel H. A. Khan and Marek A. Perkowski, “GF(4) based synthesis of quaternary reversible/quantum logic circuits,” Journal of Multiple-Valued Logic and Soft Computing, 13, pp. 583-603, 2007.
  16. Mozammel H. A. Khan and Marek A Perkowski, “Quantum ternary parallel adder/subtractor with partially-look-ahead carry,” Journal of Systems Architecture, vol. 53, no. 7, pp. 453-464, 2007.
  17. Mozammel H. A. Khan, “An ASIC architecture for generating optimum mixed polarity Reed-Muller expression,” Engineering Letters, vol. 13, no. 3, pp. 236-243, 2006.
  18. Mozammel H. A. Khan, “Design of reversible/quantum ternary multiplexer and demultiplexer,” Engineering Letters, vol. 13, no. 2, pp. 65-69, 2006.
  19. Pawel Kerntopf, Marek A Perkowski, and Mozammel H A Khan, “On universality of general reversible multiple-valued logic gates,” Journal of Multiple-Valued Logic and Soft Computing, vol. 12, no. 5-6, pp. 417-429, 2006.
  20. Mozammel H A Khan, Marek A Perkowski, Mujibur R Khan, and Pawel Kerntopf, “Ternary GFSOP minimization using kronecker decision diagrams and their synthesis with quantum cascades,” Journal of Multiple-Valued Logic and Soft Computing, vol. 11, no. 5-6, pp. 567-602, 2005.
  21. M. H. A. Khan and M. S. Alam, “Mapping of on-set fixed polarity Reed-Muller coefficients from on-set canonical sum of products coefficients and the minimization of pseudo Reed-Muller expressions,” International Journal of Electronics, vol. 86(3), pp. 255-268, 1999.
  22. M. H. A. Khan and M. S. Alam, “Mapping of fixed polarity Reed-Muller coefficients from minterms and the minimization of fixed polarity Reed-Muller expressions,” International Journal of Electronics, vol. 83(2), pp. 235-247, 1997.
  23. M. H. A. Khan and M. S. Alam, “Algorithms for conversion of minterms to positive polarity Reed-Muller coefficients and vice versa,” Information Processing Letters, vol. 62, pp. 223-230, 1997.
  24. M. H. A. Khan, “On detection and prevention of static hazard for 1-variable change,” Journal of Bangladesh Academy of Sciences, vol. 20(1), pp. 9-15, 1996.
  25. M. H. A. Khan, “An algorithm for hazard-free minimization of incompletely specified switching function,” Information Processing Letters, vol. 52, pp. 23-29, 1994.
  26. M. H. A. Khan, “OR-AND-OR network synthesis,” Journal of the Bangladesh Electronics Society, vol. 4, no. 1, pp. 29-31, 1994.
  27. M. H. A. Khan, “Computer aided determination of minimal cover of a switching function,” Journal of Bangladesh Computer Society, vol. 6, no. 1, pp. 30-035, 1993.
  28. M. H. A. Khan, “Generation of prime implicants using a co-ordinate table and rule based algorithm,” Journal of the Institution of Engineers, Bangladesh, vol. 21, no. 4, pp. 31-35, 1993.
  29. M. M. A. Khan and S. M. Rahman, “Bengali – as a medium of information interchange with computers,” Journal of Bangladesh Computer Society, vol. 2, no. 1, pp. 1 – 10, 1986.

Conference & Seminars

Conference Papers:

  1. Md. Asif Nashiry, M. H. A. Khan, and J. Rice, “Controlled and uncontrolled SWAP gates in reversible logic synthesis,” in Proc. 9th Conference on Reversible Computation (RC), 6-7 July 2017,  Kolkata, India.
  2. Mozammel H A Khan and Jacqueline E. Rice, “Improved Synthesis of Reversible Sequential Circuits,” IEEE International Symposium on Circuits and Systems (ISCAS), 22 – 25 May, 2016, Montreal, Canada.
  3. Mozammel H A Khan and Himanshu Thapliyal, “Reversible logic based mapping of quaternary sequential circuits using QGFSOP expression,’ IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 8-10 July 2015, Montpellier, France.
  4. Pronaya Prosun Das and Mozammel H. A. Khan, “Solving maximum clique problem using a novel quantum-inspired evolutionary qlgorithm,” 2nd International Conference on Electrical Engineering and Information & Communication Technology (ICEEICT), 21-23 May 2015, Dhaka, Bangladesh.
  5. Mozammel H. A. Khan, “Single-electron transistor based implementation of NOT, Feynman, and Toffoli gates,” 45th IEEE International Symposium on Multiple-Valued Logic (ISMVL), to be held on 18-20 May 2015, Waterloo, Ontario, Canada.
  6. Mozammel H A Khan, “Design of ternary reversible sequential circuits.” Proc. 8th International Conference on Electrical and Computer Engineering (ICECE), 20-22 Dec. 2014, Dhaka, Bangladesh, pp. 140-143.
  7. Pronaya Prosun Das and Mozammel H. A. Khan, “An effective quantum-inspired evolutionary algorithm for finding degree-constrained minimum spanning tree,” Proc. 4th International Multi-Conference on Trends in Engineering and Technology (IMTET’2014), Dec. 2014, Pattaya, Thailand.
  8. Pronaya Prosun Das and Mozammel H. A. Khan, “Quantum-inspired evolutionary algorithm to solve graph coloring problem,” Proc. International Conference on Advances in Computing, Electronics and Electrical Technology (CEET 2014), Kuala Lampur, Malaysia, Aug. 2014, pp. 21-25.
  9. Mozammel H A Khan, “Primitive quantum gate realizations of multiple-controlled Toffoli gates,” Proc. 16th International Conference on Computer and Information Technology (ICCIT 2013), 08-10 March 2014, Khulna, Bangladesh.
  10. Mozammel H A Khan, “An evolutionary algorithm with masked mutation for 0/1 knapsack problem,” Proc. 2nd International Conference on Informatics, Electronics & Vision (ICIEV 2013), 17-18 May 2013, Dhaka, Bangladesh.
  11. Mozammel H A Khan, “Classical arithmetic logic unit embedded on reversible/quantum circuit,” Proc. 15th International Conference on Computer and Information Technology (ICCIT 2012), 22-24 December 2012, Chittagong, Bangladesh.
  12. Mozammel H A Khan, “Quaternary quantum algorithm for determining properties of quaternary logic function,” Proc. 14th International Conference on Computer and Information Technology (ICCIT 2011), 22-24 December 2011, Dhaka, Bangladesh.
  13. Mozammel H A Khan and Raqibul Hasan, “Minimized reversible/quantum synthesis of non-reversible quinary logic function,” Proc. 14th International Conference on Computer and Information Technology (ICCIT 2011), 22-24 December 2011, Dhaka, Bangladesh.
  14. Mozammel H A Khan and Marek A Perkowski, “Synthesis of reversible synchronous counters,” Proc. 41st IEEE International Symposium on Multiple-Valued Logic (ISMVL2011), 23-25 May 2011, Tusula, Finland.
  15. Mozammel H A Khan, “GFSOP-based ternary quantum logic synthesis,” (Invited Paper) Proc. Optics and Photonics for Information Processing IV (SPIE Conference 7797), 2-5 August 2010, San Diego, CA, USA.
  16. Mozammel H. A. Khan and Raqibul Hasan, “Minimized reversible synthesis of non-reversible quinary logic function,” Proc. 12th International Conference on Computer and Information Technology (ICCIT 2009), 21-23 December 2009, Dhaka, Bangladesh.
  17. Mozammel H. A. Khan and Salena Akter, “Multiple-case outlier detection in least-squares regression model using quantum-inspired evolutionary algorithm,” Proc. 12th International Conference on Computer and Information Technology (ICCIT 2009), 21-23 December 2009, Dhaka, Bangladesh.
  18. Mozammel H A Khan, “Quantum realization of multiple-valued Feynman and Toffoli gates without ancilla input,” Proc. 39th IEEE International Symposium on Multiple-Valued Logic (ISMVL2009), 21-23 May 2009, Naha, Okinawa, Japan, pp. 103-108.
  19. Mozammel H A Khan, “Scalable architecture for synthesis of reversible quaternary multiplexer and demultiplexer circuits,” Proc. 39th IEEE International Symposium on Multiple-Valued Logic (ISMVL2009), 21-23 May 2009, Naha, Okinawa, Japan, pp. 343-348.
  20. Mozammel H A Khan, “Reversible synthesis of quinary logic function,” Proc. 18th International Workshop on Post-Binary ULSI Systems (ULSIWS2009), 20 May 2009, Naha, Okinawa, Japan.
  21. Tahseen Kamal and Mozammel H.A. Khan, “An application specific integrated circuit for optimization of fixed polarity Reed-Muller expressions,” Proc. 5th International Conference on Electrical and Computer Engineering (ICECE 2008), 20-22 December 2008, Dhaka, Bangladesh.
  22. Rashida Khanum, Tahseen Kamal, and Mozammel H. A. Khan, “Genetic algorithm based synthesis of ternary reversible/quantum circuit,” Proc. 11th International Conference on Computer and Information Technology (ICCIT 2008), 25-27 December 2008, Khulna, Bangladesh.
  23. Mozammel H A Khan, Nafisa K. Siddika, and Marek A Perkowski, “Minimization of quaternary Galois field sum of products expression for multi-output quaternary logic function using quaternary Galois field decision diagram,” Proc. 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-24 May 2008, Dallas, TX, USA, pp. 125-130.
  24. Mozammel H A Khan, “Reversible realization of quaternary decoder, multiplexer, and demultiplexer circuits,” Proc. 38th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2008), 22-24 May 2008, Dallas, TX, USA, pp. 208-213.
  25. Mozammel H A Khan, “Synthesis of incompletely specified multi-output quaternary function using quaternary quantum gates,” Proc. 10th International Conference on Computer and Information Technology (ICCIT 2007), Dhaka, Bangladesh, 27-29 December 2007.
  26. Asif I. Khan, Nadia Nusrat, Samira M. Khan, Masud Hasan, and Mozammel H. Khan, “Quantum realization of some ternary circuits using Muthukrishnan-Stroud gates,” Proc. 37th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2007), 14-16 May 2007, Oslo, Norway.
  27. Mozammel H. A. Khan and Marek A. Perkowski, “GF(4) based synthesis of quaternary reversible/quantum logic circuits,” Proc. 37th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2007), 14-16 May 2007, Oslo, Norway.
  28. M. R. Khan, M. G. A. Sujan, and Mozammel H. A. Khan, “Post-EA simplification of ternary reversible circuit,” Proc. 9th International Conference on Computer and Information Technology (ICCIT 2006), Dhaka, Bangladesh, 21-23 December 2006.
  29. Mozammel H. A. Khan, “Quaternary Galois field expansions for reversible/quantum logic synthesis,” Proc. 9th International Conference on Computer and Information Technology (ICCIT 2006), Dhaka, Bangladesh, 21-23 December 2006.
  30. Mozammel H. A. Khan, “A quantum logic circuit for generating fixed-polarity Reed-Muller coefficients,” Proc. 4th International Conference on Electrical and Computer Engineering (ICECE 2006), Dhaka, Bangladesh, 19-21 December, 2006.
  31. Mozammel H. A. Khan, “Quantum realization of quaternary Feynman and Toffoli gates,” Proc. 4th International Conference on Electrical and Computer Engineering (ICECE 2006), Dhaka, Bangladesh, 19-21 December, 2006, pp. 157-160.
  32. Mujibur Rahman Khan, Mozammel H. A. Khan, and Md. Mostofa Akbar, “A family of ternary reversible quantum gates,” Proc. 8th International Conference on Computer and Information Technology (ICCIT2005), Dhaka, Bangladesh, 28-30 Dec. 2005, pp. 388 – 392.
  33. Mozammel H A Khan, Md. Altaf Hossain, and Nasif Mahmud, “Genetic algorithm-based mapping of positive polarity Reed-Muller expressions from Boolean expressions,” Proc. 8th International Conference on Computer and Information Technology (ICCIT2005), Dhaka, Bangladesh, 28-30 Dec. 2005, pp. 1046 – 1051.
  34. Mozammel H A Khan, Marek A Perkowski, “Quantum realization of ternary parallel adder/subtractor with look-ahead carry,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  35. Mozammel H A Khan, Marek A Perkowski, “Quantum realization of ternary encoder and decoder,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  36. Mujibur Rahman Khan, Mozammel H. A. Khan, and Md. Mostofa Akbar, “Evolutionary algorithm based synthesis of multi-output ternary reversible circuits using quantum cascades,” Proc. 7th International Symposium on Representations and Methodology of Future Computing Technologies (RM2005), Tokyo, Japan, 5-6 September, 2005.
  37. Mozammel H A Khan, “Quantum realization of ternary Toffoli gate,” Proc. 3rd International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, 28-30 Dec 2004, pp. 264-266.
  38. Mozammel H A Khan, “Quantum realization of ternary adder circuits,” Proc. 3rd International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, 28-30 Dec 2004, pp. 249-252
  39. Mozammel H A Khan, “Quantum realization of ternary Toffoli gate using ion-trap realizable Muthukrishnan-Stroud primitive gates,” Proc. 7th International Conference on Computer and Information Technology (ICCIT 2004), Dhaka, Bangladesh, 26-28 Dec 2004, pp. 369-371
  40. Mozammel H A Khan and Marek A Perkowski, “Genetic algorithm based synthesis of multi-output ternary functions using quantum cascade of generalized ternary gates,” Proc. 2004 IEEE Congress of Evolutionary Computing (CEC), Portland, Oregon, USA, 20-23 June, 2004, pp. 2194-2201.
  41. Mozammel H A Khan, Marek A Perkowski, and Mujibur R Khan, “Ternary Galois field expansions for reversible logic and kronecker decision diagrams for ternary GFSOP minimization,” Proc. 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 58-67.
  42. Pawel Kerntopf, Marek A Perkowski, and Mozammel H A Khan, “On universality of general reversible multiple-valued logic gates,” Proc. 34th IEEE International Symposium on Multiple-Valued Logic (ISMVL 2004), Toronto, Canada, 19-22 May 2004, pp. 68-73.
  43. Mozammel H A Khan, “Bangladeshi universities in electronic village: issues, problems, and prospects,” Proc. International Workshop on Distributed Internet Infrastructure for Education and Research, Bangladesh University of Engineering and Technology, Dhaka, Bangladesh, 30 December 2003 – 2 January 2004, pp. 57 – 61.
  44. Mozammel H A Khan and Mujibur R Khan, “Ternary Galois field expansions and their decision diagrams,” Proc. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh, 19-21 December 2003, pp. 861-865.
  45. Mozammel H A Khan, Mujibur R Khan, and Syed A Hossain, “On construction of ternary Galois field decision diagrams,” Proc. 6th International Conference on Computer and Information Technology (ICCIT 2003), Dhaka, Bangladesh, 19-21 December 2003, pp. 870-874.
  46. Kerntopf, M. Perkowski, and M. H. A. Khan, “On universality of ternary reversible logic gates,” Proc. 12th International Workshop on Post-Binary ULSI Systems, Tokyo, Japan, May 16, 2003, pp. 1 – 8.
  47. M H A Khan, M A Perkowski, P Kerntopf, “Multi-output Galois field sum of products synthesis with new quantum cascades,” Proc. 33rd IEEE International Symposium on Multiple-Valued Logic (ISMVL 2003), Tokyo, Japan, 16-19 May 2003, pp. 146 – 153.
  48. M H A Khan and M A Perkowski, “Multi-output ESOP synthesis with cascades of new reversible gate family,” Proc. 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM 2003), Trier, Germany, 10-11 March 2003, pp. 144 – 153.
  49. M H A Khan and M A Perkowski, “Reversible logic synthesis with cascades of new gate families,” Proc. 6th International Symposium on Representations and Methodology of Future Computing Technologies (RM 2003), Trier, Germany, 10-11 March 2003, pp. 43 – 55.
  50. M H A Khan, “Design of full-adder with reversible gates,” Proc. 5th International Conference on Computer and Information Technology 2002 (ICCIT 2002), Dhaka, Bangladesh, 27-28 December 2002, pp. 515-519.
  51. S A Hossain, F Ahmed, M H A Khan, M A Sobhan and M L Rahman, “Analysis of synthesis of Bangla vowels,” Proc. 5th International Conference on Computer and Information Technology 2002 (ICCIT 2002), Dhaka, Bangladesh, 27-28 December 2002, pp. 272-276.
  52. Perkowski, P. Kerntopf, A. Al.-Rabadi, M. H. A. Khan, Multiple-Valued Quantum Computing. Issues, Open Problems, Solutions, Technical Report, KAIST, Korea, 2002.
  53. M. H. A. Khan, “A software-hardware co-method for mapping fixed polarity Reed-Muller coefficients from positive polarity Reed-Muller coefficients,” Proc. 4th International Conference on Computer and Information Technology 2001 (ICCIT 2001), Dhaka, Bangladesh, December 28-29, 2001, pp. 127-132.
  54. A. Hossain, M. H. A. Khan, and M. A. Sobhan, “Acoustic vowel space of Bangla speech,” Proc. 4th International Conference on Computer and Information Technology 2001 (ICCIT 2001), Dhaka, Bangladesh, December 28-29, 2001, pp.309-313.
  55. M. H. A. Khan, “Generation of kronecker expression for a given polarity vector from disjoint reduced sum of products expression,” Proc. 5th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RM 2001), Starkville, Mississippi, USA, August 10-11, 2001, pp. 258-270.
  56. Perkowski, L. Jozwiak, P. Kerntopf, A. Mishchenko, A. Al-Rabadi, A. Coppola, A. Buller, X. Song, M. M. H. A. Khan, S. N. Yanushkevich, V. P. Shmerko, and M. Chrzanowska-Jeske, “A general decomposition for reversible logic,” Proc. 5th International Workshop on Applications of the Reed-Muller Expansion in Circuit Design (RM 2001), Starkville, Mississippi, USA, August 10-11, 2001, pp. 119-138.
  57. M. H. A. Khan, “Generation of fixed polarity Reed-Muller expression for a given polarity vector from another fixed polarity Reed-Muller expression,” Proc. 1st International Conference on Electrical and Computer Engineering (ICECE), Dhaka, Bangladesh, January 5-6, 2001, pp. 49-51.
  58. M. H. A. Khan, “A software-hardware co-method for mapping positive polarity Reed-Muller coefficients from canonical sum of products coefficients and vice versa,” Proc. 3rd International Conference on Computer and Information Technology 2000 (ICCIT 2000), Dhaka, Bangladesh, January 25-26, 2001, pp. 94-98.
  59. M. H. A. Khan and M. S. Alam, “A tabular method of mapping on-set fixed polarity Reed-Muller coefficients from on-set canonical sum of products coefficients,” Proc. National Conference on Computer and Information Systems, Dhaka, Bangladesh, 9-10 December, 1997, pp. 331-336.
  60. M. Rahman and M. M. H. A. Khan, “A method to find the largest sub-set of disjoint products in optimization of AND-OR-EXOR three-level networks,” Proc. National Conference on Computer and Information Systems, Dhaka, Bangladesh, 9-10 December, 1997, pp. 326-330.
  61. M. E. Hossain, M. M. H. A. Khan and M. S. Alam, “Output queuing analysis in space division packet switching networks,” Proc. International Conference on Robotics, Vision and Parallel Processing for Industrial Automation, Ipoh, Malaysia, November 28-30, 1996, pp. 329-334.
  62. M. M. H. A. Khan and M. S. Alam, “Synthesis and minimization of fixed polarity Reed-Muller logic,” Proc. International Conference on Robotics, Vision and Parallel Processing for Industrial Automation, Ipoh, Malaysia, November 28-30, 1996, pp. 621-626.

Books

  1. M. M. H. A. Khan, Digital Logic Design, Bangladesh University Grants Commission, 2006.
  2. M. M. H. A. Khan, Computer Networks, Bangladesh Open University, 1999.